1. Field of the Invention
The present invention relates to a process of introduction and diffusion of platinum ions in a slice of silicon containing semiconductor devices.
2. Description of the Prior Art
The need to reduce the lifetime of minority carriers in semiconductor devices derives from different application needs for different types of devices. Device types for which this is a concern include power MOSFETs, fast diodes, insulated gate bipolar transistors (IGBT), bipolar power transistors and thyristors. The object of reducing minority carrier lifetime is to reduce the turn off times of the devices. This reduces energy losses without worsening static device characteristics.
The techniques most commonly used to reduce the minority carrier lifetimes in semiconductor devices include the deposition of gold, the deposition of platinum, and electron radiation.
The deposition of gold is frequently used but it produces two undesired effects. First of all, it causes a considerable increase in leakage current, especially with increasing temperatures. Also, it causes a substantial increase in the resistivity of the silicon of the device.
Although electron radiation does not cause high leadage currents, it does create considerable damage to the Si-SiO.sub.2 interface. This shows up as a lowering of the threshold voltage for MOS devices. The technique can also be sensitive to thermal processes at low temperature (in the range of, for example, 400.degree.-500.degree. C.) such as the processes for attaching a die to its support, normally called die attach.
The deposition of platinum offers several advantages. These include low leakage current, and stability to thermal processes at low temperature (below 700.degree. C.). In addition, compared with the process that uses the deposition of gold, deposition of platinum has lower variations in the resistivity of the resulting silicon.
The process currently in use according to the known art consists in the introduction of platinum into the slice of silicon through a process of deposition on the rear of the slice. This is followed by a process of diffusion at a temperature of approximately 900.degree. C. With this process, a thin layer of silicon oxide is formed during the diffusion. This thin layer of oxide stops further diffusion of the platinum into the slice.
One method for eliminating the layer of silicon oxide provides for the deposition over the surface of the semiconductor of a layer of palladium prior to deposition of the platinum. This has the purpose of facilitating the diffusion of the platinum. As an alternative, platinum silicides suitable for encouraging the diffusion of the platinum into the semiconductor can be formed at the silicon Si-Pt interface. Both of these methods are described in U.S. Pat. No. 4,925,812.
In any case, even when more complicated processes are used, deposition of platinum has substantial limitations. In the first place, the quantity of platinum diffused into the silicon is determined by the thermal diffusion process and by the solid solubility of the platinum in the silicon. In the second place, since the concentration of platinum is equal to the solid solubility, the surface behaves as an infinite source. This causes the distribution of platinum along the length of the slice to be highly uneven. Lastly, the deposition of platinum can be executed only on the rear of the slice of the semiconductor. This does not allow the introduction of platinum in silicon areas bounded by masking.
If it is desired deposit of platinum in well-defined areas on the front of the slice, such deposition is not possible according to the known prior art processes.